There are some types of encoder circuits implemented by transistor-transistor logic networks, including those of the static types and those of the dynamic types using CMOS logics. Problems are however encountered in each of such known encoder circuits and have resulted from the fact that the transistor-transistor logic networks forming the encoder circuits must be composed of large numbers of active devices. In the case of dynamic encoder circuits, there is required provision of precharge arrangements, transistor-transistor logics and encoder output hold circuits, all of which also use large numbers of active devices in addition to the transistors forming the encoder circuits per se. The use of such a large number of active devices for an encoder circuit requires the provision of a large device area to implement the encoder circuit on a single semiconductor chip and would further impose significant limitation in reducing the cycle time achievable of the encoder circuit.